VVCE Open Day draws students, guardians

Mysore/Mysuru: Vidyavardhaka College of Engineering (VVCE), Mysuru, hosted its flagship event, ‘Open Day 2024,’ at the Sahukar Channaiah Auditorium recently.

Drawing over 1,500 participants, including PU students and their guardians from Mysuru region, the event provided invaluable insights into opportunities in engineering education and careers.

K.S. Sundar, Associate Vice-President of Infosys, Mysuru, Ravindra Venkatesh, System Chip Design Engineer at Intel Corp., Bengaluru and Uday Shankar, Nodal Officer at CET Cell, Government of Karnataka, were the chief guests.

P. Vishwanath, Secretary of Vidyavardhaka Sangha (VVS) Mysuru, and Shrishaila Ramannavar, Treasurer were the guests of honour. Gundappa Gowda, President of VVS, Mysuru, presided.

The event aimed to raise awareness about CET counselling process, explore career paths after completing BE programmes and facilitate interaction with industry experts. It targeted prospective candidates eligible for technical courses upon completing their senior secondary education, providing valuable insights into admissions to BE programmes.

In his inaugural address, Sundar underscored the significance of problem-based learning, business transformation in engineering and interdisciplinary approaches. He emphasised the evolving role of engineers in addressing societal challenges and urged students to adapt to the changing landscape.

Sundar remarked, “Today’s engineers should have holistic knowledge rather than confined technical expertise alone. Adaptation to change is essential; while hard work remains crucial, smart work is the need of the hour.”

Dr. B. Sadashive Gowda, Principal of VVCE, elucidated the availability and types of engineering seats, stressing the importance of accreditations like NBA, NAAC and rankings such as NIRF in college selection. He also shed light on fee structures and seat allocation quotas, highlighting the intense competition for engineering seats.

A notable highlight of the event was the demonstration of the CET mock option entry portal developed by Dr. Alfred Vivek D’Souza, Assistant Professor in the Department of ECE at VVCE, aiding students in practising the seat selection process.

The event also featured a panel discussion on industry readiness, the knowledge life cycle and the significance of collaborations between academia and industry in teaching and learning.

The afternoon session showcased approximately 50 student projects across various engineering disciplines, underscoring hands-on learning and technological applications in fields such as cyber security, robotics and sustainable engineering.

This post was published on June 4, 2024 7:18 pm